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| AT22V10B Features * * * * * * * High Performance Programmable Logic Device 7.5 ns Max Propagation Delay Up to 166 MHz Operation 5 V 10% Operation Fully Compatible with Standard 22V10 Identical Functionality/Fuse-Map TTL Compatible Inputs and Outputs 10 A Leakage Maximum Reprogrammable - Tested 100% for Programmability High Reliability Proven UV Erasable CMOS Technology 2000 V ESD Protection 200 mA Latch-Up Protection Full Military, Commercial and Industrial Temperature Ranges Dual-In-Line and Surface Mount Packages with Standard Pinouts High Speed UV Erasable Programmable Logic Device Logic Diagram OE PRODUCT TERMS 12 INPUT PINS PROGRAMMABLE INTERCONNECT AND COMBINATORIAL LOGIC ARRAY 1 LOGIC OPTION 8 TO 16 PRODUCT TERMS (UP T0 10 FLIP-FLOPS) OUTPUT OPTION 10 I/O PINS Description The AT22V10B is an ultra-high performance CMOS Programmable Logic Device (PLD). Speeds down to 7.5 ns and operation up to 166 MHz are offered. All pins offer a low 10 A leakage. The AT22V10B logic functionality is fully compatible with the standard 22V10. The 12 dedicated inputs and ten configurable I/O pins allow implementation of logic requiring up to 22 input signals. The AT22V10B also provides individual output enable product terms for each of the ten I/Os. (continued) DIP/SOIC PLCC Vcc I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O IN CLK/IN IN IN IN IN IN * IN IN IN 8 * 1 VCC I/O I/O I/O I/O I/O 22 * I/O I/O I/O Pin Configurations Pin Name CLK/IN IN I/O * VCC Function Clock and Logic Input Logic Inputs Bidirectional Buffers No Internal Connection +5 V Supply CLK/IN IN IN IN IN IN IN IN IN IN IN GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 15 IN IN I/O * GND IN I/O 0226B 1-109 Description (Continued) The AT22V10B incorporates a variable product term architecture. Each output is allocated from eight to 16 product terms, which allows highly complex logic functions to be realized. The AT22V10B includes two additional product terms to provide synchronous preset and asynchronous reset. These terms are common to all ten registers. All registers are automatically cleared upon power up. Register preload simplifies testing. A security fuse prevents unauthorized copying of programmed fuse patterns. Absolute Maximum Ratings* Temperature Under Bias.................-55oC to +125oC Storage Temperature......................-65oC to +150oC Voltage on Any Pin with Respect to Ground........................ -2.0 V to +7.0 V(1) Voltage on Input Pins with Respect to Ground During Programming................... -2.0 V to +14.0 V(1) Programming Voltage with Respect to Ground...................... -2.0 V to +14.0 V(1) Integrated UV Erase Dose .............. 7258 W*sec/cm2 *NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: 1. Minimum voltage is -0.6 V dc which may undershoot to -2.0 V for pulses of less than 20 ns. Maximum output pin voltage is VCC+0.75 V dc which may overshoot to +7.0 V for pulses of less than 20 ns. Logic Options SP To Output D CK Q Q To Output AR From Output Output Options OE OE From Logic Option I/O From Logic Option I/O 1-110 AT22V10B AT22V10B D.C. and A.C. Operating Conditions Commercial AT22V10B -7 Operating Temperature (Case) VCC Power Supply 0oC - 70oC 5 V 5% Commercial AT22V10B -10 0oC - 70oC 5 V 10% Industrial AT22V10B -10 -40oC - 85oC 5 V 10% Military AT22V10B -10 -55oC - 125oC 5 V 10% D.C. Characteristics Symbol Parameter ILI ILO ICC IOS VIL VIH VOL (1) Condition VIN = -0.1 V to VCC+1 V VOUT = -0.1 V to VCC+0.1 V f = 0 MHz to FMAX, VCC = MAX, VIN = GND, Outputs Open Com. Ind., Mil. Min Max 10 10 140 160 Units A A mA mA mA V V V V V V Input Load Current Output Leakage Current Power Supply Current Output Short Circuit Current VOUT = 0.5 V Input Low Voltage Input High Voltage Output Low Voltage VIN = VIH or VIL, VCC = MIN VIN = VIH or VIL, VCC = MIN IOL = 16 mA IOL = 12 mA IOL = 24 mA Com.,Ind. Mil. Com. -30 -0.6 2.0 -120 0.8 VCC+0.75 0.5 0.5 0.8 2.4 VOH Output High Voltage IOH = -4.0 mA Notes: 1. Not more than one output at a time should be shorted. Duration of short circuit test should not exceed 30 sec. 1-111 A.C. Waveforms (1) INPUTS,I/O REG. FEEDBACK SYNCH. PRESET tS CP tH tWP tWH tP tAR ASYNCH. RESET tCO REGISTERED OUTPUTS tPD COMBINATORIAL OUTPUTS OUTPUT VALID OUTPUT VALID tAW tAP OUTPUT VALID OUTPUT VALID tER tER tEA HIGH Z OUTPUT VALID tEA HIGH Z OUTPUT VALID Note: 1. Timing measurement reference is 1.5 V. Input AC driving levels are 0.0 V and 3.0 V, unless otherwise specified. A.C. Characteristics AT22V10B-7 Symbol tPD tEA tER tCF tCO tS tH tP tWL tWH FMAX tAW tAR tAP Note: (1) (1) AT22V10B-10 Max Min Typ Max Parameter Input or Feedback to Non-Registered Output Input to Output Enable Input to Output Disable Clock to Feedback Clock to Output Input or Feedback Setup Time Hold Time Clock Period Clock Width Low Clock Width High External Feedback 1/(tS+tCO) Internal Feedback 1/(tS + tCF) No Feedback 1/(tP) Asynchronous Reset Width Asynchronous Reset, Synchronous Preset, Recovery Time Asynchronous Reset to Registered Output Reset Min Typ Units ns ns ns ns ns ns ns ns ns ns 5 5 5 0 0 3.5 0 6 3 3 1 3.5 2 7.5 7.5 7.5 2 5.5 0 0 5 0 7 3.5 3.5 111 166 166 6 6 6 1 4 3 10 10 10 2 7 83 142 142 7 8 4 5 8 14 MHz MHz MHz ns ns ns 6 7 3 4 6 10 1. This parameter is only sampled and is not 100% tested. Input Test Waveforms and Measurement Levels 3.0V AC DRIVING LEVELS 0.0V 1.5V AC MEASUREMENT LEVEL Output Test Loads: Commercial 5.0V R1= 250 Military 5.0V R1= 338 OUTPUT PIN OUTPUT PIN CL= 50pF R2= 167 (1) CL= 50pF R2= 248 tR, tF < 2 ns (10% to 90%) Note: 1. CL = 30 pF for AT22V10B-7 1-112 AT22V10B AT22V10B Functional Logic Diagram AT22V10B 1-113 Preload of Registered Outputs The registers in the AT22V10B are provided with circuitry to allow loading of each register asynchronously with either a high or a low. This feature will simplify testing since any state can be forced into the registers to control test sequencing. A VIH level on the I/O pin will force the register high; a VIL will force it low, independent of the polarity bit (C0) setting. The preload state is entered by placing an 10.5-V to 12-V signal on pin 8 on DIPs, and pin 10 on SMPs. When the clock pin is pulsed high, the data on the I/O pins is placed into the ten registers. Level forced on registered output pin during preload cycle VIH VIL Register state after cycle High Low VH PRELOAD tD tD tD tD tD tDMIN = 100 ns CLOCK REGISTERED OUTPUTS PRELOAD ENA. FORCEI/O'S PRELOAD DATA OUTPUTS DIS. TO VIH ORVIL CLOCKED IN OUTPUT VOLTAGE REMOVED 3.8 V PRELOAD DISABLED Power Up Reset The registers in the AT22V10B are designed to reset during power up. At a point delayed slightly from VCC crossing 3.8 V, all registers will be reset to the low state. The output state will depend on the polarity of the output buffer. This feature is critical for state machine initialization. However, due to the asynchronous nature of reset and the uncertainty of how VCC actually rises in the system, the following conditions are required: 1) The VCC rise must be monotonic, 2) After reset occurs, all input and feedback setup times must be met before driving the clock pin high, and 3) The clock must remain stable during tPR. POWER tPR REGISTERED OUTPUTS tW tS CLOCK Parameter tPR Description Power-Up Reset Time Min Typ 600 Max Units 1000 ns Pin Capacitance (f = 1 MHz, T = 25C) (1) Typ CIN COUT Note: Max 8 8 Units pF pF Conditions VIN = 0 V VOUT = 0 V 5 6 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. Erasure Characteristics The entire fuse array of an AT22V10B is erased after exposure to ultraviolet light at a wavelength of 2537 A. Complete erasure is assured after a minimum of 20 minutes exposure using 12,000 2 W/cm intensity lamps spaced one inch away from the chip. Minimum erase time for lamps at other intensity ratings can be 1-114 calculated from the minimum integrated erasure dose of 15 W*sec/cm2. To prevent unintentional erasure, an opaque label is recommended to cover the clear window on any UV erasable PLD which will be subjected to continuous fluorescent indoor lighting or sunlight. AT22V10B AT22V10B SUPPLY CURRENT vs. INPUT FREQUENCY AT22V10B (TA = 25C, VCC = 5V) 150 N o r m a l i z e d I C C 0 20 40 60 80 100 1.4 NORMALIZED ICC vs. AMBIENT TEMP. f = 50 MHz 120 1.2 I C C 90 (mA) 60 1.0 30 0.8 0 0.6 -55 -25 5 35 65 95 125 Frequency (MHz) Ambient Temperature (C) NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE N o r m a l i z e d I C C 1.4 O u t p u t C u r r e n t 4.5 5.0 5.5 6.0 OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE (TA = 25C, VCC = 5V) 0 -20 1.2 -40 (mA) -60 1.0 0.8 -80 0.6 4.0 -100 0 1 2 3 4 5 Supply Voltage (V) Output Voltage (V) OUTPUT SOURCE CURRENT vs. SUPPLY VOLTAGE (VOH = 2.4V) O u t p u t C u r r e n t 0 O u t p u t 0 OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE (TA = 25C, VCC = 5V) -1 -15 (mA) -30 -45 4.0 4.5 5.0 5.5 6.0 -2 C (mA) u r -3 r e n t -4 3.5 3.7 3.9 4.1 4.3 4.5 Supply Voltage (V) Output Voltage (V) OUTPUT SINK CURRENT vs. SUPPLY VOLTAGE (VOL = 0.5V) O u t p u t 34 33 32 O u t p u t C u r r e n t 4.5 5.0 5.5 6.0 150 OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE (TA = 25C, VCC = 5V) 120 31 C (mA) u 30 r r e n t 29 28 4.0 90 (mA) 60 30 0 0 1 2 3 4 5 Supply Voltage (V) Output Voltage (V) 1-115 NORMALIZED TPD vs. SUPPLY VOLTAGE N o r m a l i z e d T P D 1.3 N o r m a l i z e d T P D 4.0 4.5 5.0 5.5 6.0 1.5 NORMALIZED TPD vs. TEMPERATURE 1.2 1.3 1.1 1.1 1.0 0.9 0.9 0.7 -55 -25 5 35 65 95 125 Supply Voltage (V) Ambient Temperature (C) NORMALIZED TCO vs. SUPPLY VOLTAGE N o r m a l i z e d T C O 1.2 N o r m a l i z e d T C O 4.0 4.5 5.0 5.5 6.0 1.5 NORMALIZED TCO vs. TEMPERATURE 1.1 1.3 1.0 1.1 0.9 0.9 -55 -25 5 35 65 95 125 Supply Voltage (V) Ambient Temperature (C) NORMALIZED TS vs. SUPPLY VOLTAGE 1.2 N o r m a l i z e d T S 1.1 1.0 0.9 0.8 0.7 4.0 4.5 5.0 5.5 6.0 T S 0.7 -55 -25 N o r m a l i z e d 1.3 NORMALIZED TS vs. TEMPERATURE 1.1 0.9 5 35 65 95 125 Supply Voltage (V) Ambient Temperature (C) DELTA TPD vs. OUTPUT LOADING (VCC = 4.5V, OUTPUT LOAD = COMMERCIAL) 12 D e l t a T P D 0 n s -4 0 100 200 300 400 n s D e l t a T C O DELTA TCO vs. OUTPUT LOADING ( VCC = 4.5V, OUTPUT LOAD = COMMERCIAL ) 12 8 9 6 4 3 0 -3 0 100 200 300 400 Output Load (jig included) Capacitance pF Output Load (jig included) Capacitance pF 1-116 AT22V10B AT22V10B Ordering Information tPD (ns) 7.5 tS (ns) 3.5 tCO (ns) 5.5 Ordering Code AT22V10B-7DC AT22V10B-7JC AT22V10B-7PC AT22V10B-10DC AT22V10B-10GC AT22V10B-10JC AT22V10B-10PC AT22V10B-10SC AT22V10B-10DI AT22V10B-10GI AT22V10B-10JI AT22V10B-10PI AT22V10B-10SI AT22V10B-10DM AT22V10B-10GM AT22V10B-10LM AT22V10B-10NM AT22V10B-10DM/883 AT22V10B-10GM/883 AT22V10B-10LM/883 AT22V10B-10NM/883 AT22V10B-12LM/883 AT22V10B-12NM/883 10 5 7 5962-87539 06 LA 5962-87539 06 3X Package 24DW3 28J 24P3 24DW3 24D3 28J 24P3 24S 24DW3 24D3 28J 24P3 24S 24DW3 24D3 28LW 28L 24DW3 24D3 28LW 28L 28LW 28L 24DW3 28L Operation Range Commercial (0C to 70C) Commercial (0C to 70C) 10 5 7 Industrial (-40C to 85C) Military (-55C to 125C) Military/883C (-55C to 125C) Class B, Fully Compliant Military/883C (-55C to 125C) Class B, Fully Compliant Package Type 24DW3 24D3 28J 28LW 28L 24P3 24S 24 Lead, 0.300" Wide, Windowed, Ceramic Dual Inline Package (Cerdip) 24 Lead, 0.300" Wide, Non-Windowed (OTP), Ceramic Dual Inline Package (Cerdip) 28 Lead, Plastic J-Leaded Chip Carrier OTP (PLCC) 28 Pad, Windowed, Ceramic Leadless Chip Carrier (LCC) 28 Pad, Non-Windowed, Ceramic Leadless Chip Carrier OTP (LCC) 24 Lead, 0.300" Wide, Plastic Dual Inline Package OTP (PDIP) 24 Lead, 0.300" Wide, Plastic Gull Wing Small Outline OTP (SOIC) 1-117 |
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